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 PD - 9.1254
IRL630S
HEXFET(R) Power MOSFET
Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Repetitive Avalanche Rated Logic-Level Gate Drive RDS(ON) Specified at VGS = 4V & 5V 150C Operating Temperature Description
Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application.
VDSS = 200V RDS(on) = 0.40 ID = 9.0A
SMD-220
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C PD @TC = 25C Continuous Drain Current, VGS @ 5.0V Continuous Drain Current, VGS @ 5.0V Pulsed Drain Current Power Dissipation Power Dissipation (PCB Mount)** Linear Derating Factor Linear Derating Factor (PCB Mount)** Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
9.0 5.7 36 74 3.1 0.59 0.025 10 250 9.0 7.4 5.0 -55 to + 150 300 (1.6mm from case)
Units
A
W W/C V mJ A mJ V/ns C
VGS EAS IAR EAR dv/dt TJ, TSTG
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB Mount)** Junction-to-Ambient
Min.
---- ---- ----
Typ.
---- ---- ----
Max.
1.7 40 62
Units
C/W
** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.
Revision 0
IRL630S
Electrical Characteristics @ T = 25C (unless otherwise specified) J
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. 200 --- --- --- 1.0 4.8 --- --- --- --- --- --- --- --- --- --- ---
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.40 VGS = 5.0V, ID = 5.4A 0.50 VGS = 4.0V, ID = 4.5A 2.0 V VDS = VGS, ID = 250A --- S VDS = 50V, ID = 5.4A 25 VDS = 200V, VGS = 0V A 250 VDS = 160V, VGS = 0V, TJ = 125C 100 VGS = 10V nA -100 VGS = -10V 40 ID = 9.0A 5.5 nC VDS = 160V 24 VGS = 10V, See Fig. 6 and 13 --- VDD = 100V ns --- ID = 9.0A --- RG = 6.0 --- RD = 11, See Fig. 10 Between lead, --- 4.5 --- 6mm (0.25in.) nH from package --- 7.5 --- and center of die contact --- 1100 --- VGS = 0V --- 220 --- pF VDS = 25V --- 70 --- = 1.0MHz, See Fig. 5
Typ. --- 0.27 --- --- --- --- --- --- --- --- --- --- --- 8.0 57 38 33
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 230 1.7 9.0 A 36 2.0 350 2.6 V ns C
Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 9.0A, VGS = 0V TJ = 25C, IF = 9.0A di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ISD 9.0A, di/dt 120A/s, VDD V(BR)DSS, TJ 150C Pulse width 300s; duty cycle 2%.
VDD = 25V, starting TJ = 25C, L = 4.6mH RG = 25, IAS = 9.0A. (See Figure 12)
IRL630S
100
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.75V 2.50V BOTTOM 2.25V TOP
100
I , Drain-to-Source Current (A) D
10
I , Drain-to-Source Current (A) D
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.75V 2.50V BOTTOM 2.25V TOP
10
2.25V
1
1
2.25V 20s PULSE WIDTH Tc = 25C
0.1 1 10 100
0.1
A
0.1 0.1 1
20s PULSE WIDTH TC = 150C
10 100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics, TC = 25oC
Fig 2. Typical Output Characteristics, TC = 150oC
100
R DS(on) , Drain-to-Source On Resistance (Normalized)
2.5
ID = 9.0A
I D , Drain-to-Source Current (A)
2.0
10
TJ = 150C
1.5
1
TJ = 25C
1.0
0.1
0.5
0.01 2.0
V DS = 50V 20s PULSE WIDTH
2.5 3.0 3.5 4.0 4.5
A
5.0
0.0 -60 -40 -20
VGS = 5.0V
0 20 40 60
A
80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRL630S
2000
VGS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = C gs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
10
I D = 9.0A VDS = 160V VDS = 100V VDS = 40V
8
C, Capacitance (pF)
1500
Ciss
1000
6
4
Coss
500
Crss
0 1 10
2
A
100
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
10s
ID , Drain Current (A)
10
10
100s
TJ = 150C TJ = 25C
1
1ms
1
10ms 100ms
0.1 0 0.4 0.8 1.2
VGS = 0V
A
0.1 1
TC = 25C TJ = 150C Single Pulse
10 100 1000
1.6
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRL630S
VDS
10
RD
VGS RG
D.U.T. VDD
ID, Drain Current (Amps)
8
5.0V
Pulse Width 1 s Duty Factor 0.1 % 6
Fig 10a. Switching Time Test Circuit
4
2
0 25 50 75 100 125
150
A
TC , Case Temperature (C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (ZthJC )
1
D = 0.50
0.20 0.10 0.1 0.05
PD M
t
0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
N o te s : 1 . D u ty fa c to r D = t 1 /t 2
1
t 2
0.01 0.00001
2 . P e a k TJ = P D M x Z th J C + T C
0.0001
0.001
0.01
0.1
1
10 A
A
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRL630S
EAS , Single Pulse Avalanche Energy (mJ)
600
TOP
500
ID 9.0A 5.7A BOTTOM 4.0A
5.0V
400
Fig 12a. Unclamped Inductive Test Circuit
300
200
100
0
VDD = 50V
25 50 75 100 125
A
150
Starting TJ , Juntion Temperature (C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
5.0V
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRL630S
Peak Diode Recovery dv/dt Test Circuit
D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
RG
* * * *
dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
IRL630S
Package Outline
SMD-220 Outline
Tape and Reel Information
Part Marking Information
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371 Data and specifications subject to change without notice.


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